Rust on Espressif chips

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Now I am working at Espressif I opinion on publishing updates roughly every quarter appropriate to lift up the neighborhood within the loop around the esp rust effort.

Documentation & Planning

One in all the toughest capabilities in any neighborhood mission is onboarding original developers, in particular within the early stages of a mission the place API’s, processes and tooling is altering fleet; it could most likely perhaps even be irritating to work on something one week, and within the next you are fighting to procure it compiling again. We began work on a e book in which we can are trying to lift up as a offer of truth for the Rust esp effort. This could occasionally likely perhaps encompass set up instructions, tooling guides, ecosystem overviews and powerful more.

Now we be pleased got additionally place collectively a side dual carriageway scheme mission on github, with the aim of managing the mission from Espressif’s level of glimpse, but additionally to permit original contributors to employ up backlog items. Simply comment within the subject if there is something you’ll be pleased to buy a stab at, we’re bigger than ecstatic to abet and review. We additionally host bi-weekly meetings which anyone is welcome to attend, appropriate plunge a comment within the most contemporary discussion thread.

Utilizing the Rust unheard of library on Espressif chips

In the final put up, I talked about that turned into as soon as conceivable to exercise the Rust unheard of library thanks to @ivmarkov‘s exhausting work; effectively, he is been at it again! He pushed forward and managed to upstream the unheard of library adjustments required to construct std on high of esp-idf. From Rust 1.56 it the adjustments will likely be valid, which diagram it be conceivable to exercise the upstream Rust toolchain to construct the std platform for any RISC-V Espressif chip! At the 2d, that handiest involves the esp32c3 but there are more to arrive. This swap additionally applies to Xtensa chips, nonetheless they tranquil require a custom toolchain due to the inability of a backend for Xtensa in upstream LLVM. For more records within the std effort, please witness the e book. I could additionally be pleased to buy this time to thank the upstream Rust developers for the instantaneous and helpful reports, in yell @Amanieu for helping us push this over the attain line.

Compiler

The custom toolchain is a hindrance to developer onboarding, in particular if developers must construct it themselves. We now provide a prebuilt toolchain’s for all fashioned OS’s below the esp-rs/rust-construct repository. A few days after a brand original Rust release we on the total be pleased the original compiler ready, unless we amble into any points; talking of, we now take a look at the compiler with about a initiatives in CI so confidently we develop no longer ship a broken compiler. Repeat that this extra compiler step is handiest required when focusing on Espressif’s Xtensa based chips.

There be pleased been about a enhancements to the compiler fork since the final put up, for one the patch living we now must living up has lowered in size thanks to the std library adjustments being upstreamed. There is now asm! give a boost to for the Xtensa structure, which additionally diagram we now be pleased eliminated the dilapidated llvm_asm! macros from the xtensa crates and ported them to the original syntax.

SVDs

SVDs be pleased been coming alongside very nicely, we now be pleased respectable SVDs for the esp32c3, esp32s2 and the esp32. Whereas you occur to’ve got got been following this effort for some time, you have to presumably even be thinking we already had an esp32 SVD, effectively you have to presumably be appropriate! Alternatively, it turned into as soon as very hacky, uncared for an excessive amount of peripherals and turned into as soon as all around homely to work with. The original SVD targets to be more total and importantly more fixed. One thing that has been missing from the respectable SVDs is interrupt records, nonetheless this has currently modified and interrupt records for every peripheral is now available. Total the SVDs available now are in a expansive living to feed into svd2rust and totally different tooling, ready for HAL advent.

espflash

espflash is a rewrite of Espressif’s esptool.py, but additionally has cargo integration. Or no longer it has been below heavy pattern and now has a 1.0 release! At the side of:

  • Make stronger for flashing:
    • esp32
    • esp32c3
    • esp32s2
    • esp8266
  • Compression for sooner flashing.
  • Make stronger for the esp-idf partition table layout.
  • Make stronger for flashing a inventory esp-idf bootloader.
  • Eliminated give a boost to xargo & cargo xbuild, now focusing give a boost to on construct-std.
  • Reading abet flash records.
  • Reading some EFUSE values.
  • elf2image efficiency, for writing the formatted image to a file.
  • Dazzling & helpful error messages with miette.

Astronomical thanks to the total contributors on this release, in particular @icewind1991.

probe-rs

Now we be pleased got additionally started including give a boost to for flashing and debugging Espressif chips with probe-rs. As the RISC-V structure is already supported in probe-rs, we living out to add give a boost to for the esp32c3 on the starting up. We are ecstatic to yarn that probe-rs grasp now has a flash algorithm able to flashing the esp32c3! The esp-flash-loader repository contains the code for the esp32c3 flash loader, but thanks for Espressif’s ROM API it will tranquil be very easy to port the algorithm to the several chips. Xtensa give a boost to for probe-rs is deliberate at final, but will buy some time to place into effect. A huge thanks to the probe-rs folks, in yell @Yatekii, @Tiwalun and @Dirbaio for the reports and assistance.

Having probe-rs give a boost to offers us fleet access to RTT for instantaneous, low overhead logging. Now we be pleased got the esp32c3 the exercise of RTT with probe-rs within the community, nonetheless about a patches are required due to the esp32c3‘s lack of atomics. Whereas we now be pleased contributed to crates equivalent to atomic-polyfill these crates are slightly intrusive and require totally different ecosystem crates to rely on them as a substitute of core::sync::atomic. To wrestle this, we’re within the formula of writing an atomic emulation trap handler. This works by treating the esp32c3 be pleased it has atomic give a boost to (construct as riscv32imac-unknown-none-elf), and when we trap on the atomic instructions, we decode them and emulate them in scheme transparently. There’s a efficiency penalty that it’s roughly 2-4x slower than native instructions fixed with our sorting out, but having an atomic story is critical within the embedded Rust ecosystem.

What’s next?

Proceed to toughen the tooling around Rust with Espressif chips, till we now be pleased out of the sphere options for many reports. Proceed to construct and polish unheard of library exercise with Espressif chips, in addition to the #![no_std] story. We could presumably additionally be pleased to procure the exercise of rustc_codegen_gcc to are trying to target Espressif’s Xtensa chips. The pinnacle purpose will tranquil be to upstream the Xtensa backend to LLVM, but rustc_codegen_gcc could also permit focusing on Xtensa chips sooner as GCC already has a valid Xtensa backend.

Expect one other update early next year!

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